90° Hybrid Coupler

To achieve a broadband 3 dB split with ~90° quadrature across 3.4–4.2 GHz, I started with a single-box branchline baseline and moved to a double-box branchline architecture for improved bandwidth. This choice was driven by the project requirement to meet tight amplitude and phase balance across a wide fractional bandwidth.

Ideal Transmission Line Simulations

I first validated the double-box architecture using ideal transmission-line elements to sanity-check the topology against the required metrics. Return loss and coupling balance were within spec across the band (e.g., S11 better than −20 dB), while isolation (S41) was the main metric that initially missed margin, guiding where I focused optimization effort in the microstrip/EM stages. 

These ideal-line results were pre-optimization, so the goal was not final compliance, but to confirm the topology behaved correctly before introducing real discontinuities, dispersion, and layout parasitics. 

Figure 1: Ideal Transmission Line Schematic for Hybrid Coupler

Figure 2: Ideal Transmission Line Simulation Results for Hybrid Coupler

Microstrip Implementation

Design:

Using the ideal-line impedances as a starting point, I converted each section to microstrip MLIN elements using Keysight LineCalc for initial widths/lengths. I preserved symmetry where possible, and included MTEE/discontinuity models at junctions to capture shunt/series parasitics before optimization. 

Optimization:

I then optimized the microstrip parameters with goals tied directly to the required specs (S11, S41, and S21/S31 magnitude + phase) across 3.4–4.2 GHz. Geometry constraints were enforced to keep the layout manufacturable (e.g., feature size > 6 mil, consistent with the project requirement). Allowing the two series arms to vary independently (adding W4) was the key change that enabled isolation to converge during schematic-level optimization.

Figure 3: Microstrip Implementation for Hybrid Coupler

Figure 4: Microstrip Simulation Results for Hybrid Coupler

emCosim Simulations and Layout Optimization

Design:

After generating the layout, I parameterized the physical dimensions so a single variable could drive multiple layout features (e.g., one width used by multiple line segments). I then created a layout EM symbol and re-inserted it into the ADS schematic to run Momentum EM co-simulation (emCosim) and perform final tuning in the electromagnetic domain. 

Figure 5: Generated Layout from Microstrip Implementation

Figure 6: Layout Optimization on ADS Schematic with Layout Symbol

I fabricated the final layout at PCBWay on 20-mil Rogers 4003C, 1-oz copper, ENIG, as a single-layer microstrip with a continuous bottom ground (matching the simulated stack-up). One important as-built difference: I added connector-ground stitching (2 mm vias/traces near the launches) for mechanical/ground robustness; these features were not included in the EM model, and may contribute to the measured isolation/phase deviations. 

Figure 8: PCB Way Fabrication Selections

Figure 9: PCB Way Design for Manufacturing

Figure 10: Fabricated Hybrid Coupler

SMA Edge-Launch Soldering

For connector attachment, I used Taoglas edge-launch SMAs which were rated up to much higher frequencies than this. Each pad and connector foot were pre-tinned with flux and lead solder. With a JBC micro-iron at 400 °C it took about three seconds per pin, which kept the 4003C substrate cool enough to avoid browning. A fast IPA scrub immediately afterwards removed visible flux residue. I inspected each trace for connectivity and ensured no shorting of lines had been created.

I did not trim the input microstrip flush to the SMA launch, and some pads have excess solder from hand assembly. Both can add effective electrical length and introduce launch parasitics that impact isolation and phase.

Because I only have a 2-port LibreVNA, I used the scikit-rf multiport-from-twoport workflow: measure all six 2-port combinations while terminating the unused ports in 50 Ω, then stitch the results into a 4-port network. The VNA sits under a PWM desktop fan (AC Infinity 92 mm) that holds the enclosure near 28 °C. Without airflow, phase and S-parameter measurements can drift by several degrees during long sweeps on a low-cost VNA. I performed a SOLT calibration over 3.4–4.2 GHz at the ends of phase-matched semi-rigid cables, re-calibrating whenever a cable was disturbed. For each sweep, the two unused ports were terminated with 50 Ω loads, and I saved the six measurements as p12, p13, … p34 Touchstone files. Using the scikit-rf multiport measurement approach (linked below), I wrote a script that loads the six 2-port Touchstone files, preserves port mapping, stitches them into a 4-port network, and exports an .s4p file. It then computes and plots dB(S11), dB(S41), and the magnitude/phase of the ratio S21/S31, saving the plots as a PNG for documentation.. The code is documented at the bottom of the web page.

Link: Measuring Multiport Device with a 2 Port Network Analyzer

I also created a sweep checklist that maps each measurement pair to the correct terminated ports, reducing setup errors and improving repeatability. 

NOTE: There is a photo gallery below of all of the testing configurations and equipment. 

Photo Gallery

Measured results matched simulation well for return loss and coupling, but isolation degraded to ~−23 dB versus ~−43 dB predicted, and the phase difference exceeded 100° above ~3.9 GHz. Likely contributors include SMA launch inductance, small connector misalignment, and an added ~0.4 mm of effective line length from hand solder/reflow, plus additional uncertainty from my first complete multiport measurement workflow. The measured response also shows a right-shift in the effective center frequency (~4.0 GHz), consistent with launch/port-stub effects. Next steps: include the SMA footprint + launch geometry in the EM model, explicitly model via-to-ground stitching, shorten/trim port stubs after soldering, and re-fabricate for re-test. I’d also run a Monte-Carlo tolerance analysis to bound how much isolation/phase can vary from manufacturing and assembly.