A broadband 90-degree hybrid coupler to cover the frequency range 3.4 to 4.2 GHz.
To achieve a broadband 3 dB power split with a 90° phase difference, I initially considered a single-box branchline coupler. However, the target frequency range of 3.4–4.2 GHz exceeded what a single-box design could reliably support. To improve bandwidth and meet spec across this wider range, I implemented a double-box coupler topology instead.
Initial simulations were run using ideal transmission lines to validate the double-box architecture against system specs. The results were promising: return loss and coupling met all requirements, with dB(S11) < –20 dB across the band. The only underperforming metric was isolation at Port 4 (dB(S41)), which fell short of the desired threshold.
That said, these simulations were conducted before any tuning or optimization steps, so the performance was a strong starting point. The next step was to shift from ideal lines to a more realistic microstrip-based schematic and focus on improving isolation through layout and parameter tuning.
Design:
Using the impedance values from the ideal design, I generated initial width and length estimates for the microstrip lines via Keysight LineCalc. These served as the baseline for the physical layout. To maintain simplicity and symmetry in the design, the top and bottom series lines were initially assigned equal dimensions. M-tees were included at junctions to better reflect real-world discontinuities between shunt and series branches.
Each section of the coupler was designed with identical widths and lengths where appropriate to reduce layout complexity and adhere to proven broadband design techniques from literature.
Optimization:
To refine performance, I set up four optimization goals based on return loss, isolation, and coupling performance across the 3.4–4.2 GHz band. I used a gradient-based optimization algorithm to tune the microstrip parameters. During this process, I applied physical constraints such as a 6 mil lower limit for W2 to avoid unrealistic geometries.
Initially, the design used equal widths for both series arms, but this approach couldn’t meet isolation specs. To address this, I added W4 as a separate tuning parameter, which ultimately allowed the optimizer to converge on a solution that met all the design targets.
After finishing the EM-optimised layout, I sent the design to PCBWay on 20-mil Rogers 4003C with 1-oz copper and ENIG finish, matching the simulation stack-up. I kept everything single-layer microstrip with a continuous bottom ground and added 2 mm via holes to ground (these were not simulated into the design).
PCB Way Selection
For connector attachment, I used Taoglas edge-launch SMAs which were rated up to much higher frequencies than this. Each pad and connector foot were pre-tinned with flux and lead solder. With a JBC micro-iron at 400 °C it took about three seconds per pin, which kept the 4003C substrate cool enough to avoid browning. A fast IPA scrub immediately afterwards removed visible flux residue. I inspected each trace for connectivity and ensured no shorting of lines had been created.
NOTE: One might be able to see that I did not trim the input line from the SMA connector and I tinned extra lead onto the pads that did not need to be included (not on purpose of course, but it was a result of having lots of flux without a stencil specifically made for this board).
I only have a two-port LibreVNA, I followed the Tippet multi-port method from the scikit-rf example. I am measuring a four-port SUT so the theory is to terminate the unused ports with a 50 ohm impedance terminations for the ports not being measured. The VNA itself sits under a PWM desktop fan (an AC-Infinity 92 mm unit) that locks its enclosure at 28 °C; without the airflow, phase and S parameters measurements can wander several degrees during long sweeps because this is a relatively low-cost VNA. I used a fresh SOLT calibration from the measured frequencies of 3.4 GHz to 4.2 GHz with the ends of a pair of phase-matched Matrics 0.085-inch semi-rigid cables, hand torqued, and re-calibrated whenever a cable was disturbed. Each of the four unused ports was terminated with a 50 ohm SMA connector load, then I ran six sweeps—P1-P2 through P3-P4—saving each as an .s2p file named p12, p13, … p34. In Python, scikit-rf’s n_twoports_2_nport() stitched the six data sets into a full 4 × 4 network automatically, eliminating the bookkeeping errors that had plagued my first attempts. Below is the script I used to pull these files together and report the data.
Link: Measuring Multiport Device with a 2 Port Network Analyzer
Additionally, I made a table so I knew which measurements I was supposed to take and which ports where supposed to be terminated into 50 ohm loads per sweep.
NOTE: There is a photo gallery below of all of the testing configurations and equipment.
The stitched measurements line up well with simulation on return loss and coupling, but isolation bottoms out at –23 dB instead of the predicted –43 dB, and the phase difference creeps past 100° above 3.9 GHz. I suspect launch inductance, slight SMA mis-alignment and the extra ~0.4 mm of line I introduced during hand-reflow along with losses in the testing equipment and errors in my testing process (first time testing on a VNA). One can also observe that my designed for frequency is shifted to the right roughly at 4.0 GHz now (because of the port stub length most likely). Next steps (if I were to optimize the design further) are to put the SMA footprints into the EM model, model the VIAGNDs properly, trim the port stubs after soldering, reduce the ground SMA footprints and add more vias to ground, and then repeat the whole process fabrication and testing process. Additionally, I would run Monte Carlo simulations on design tolerances to see where my EM simulation results could land and determine if these results here were applicable.